Video-Rate Image Correlation Processor

J. J. Pearson; D. C. Hines Jr.; S Golosman; C. D. Kuglin

doi:10.1117/12.955714

8 December 1977 Video-Rate Image Correlation Processor

J. J. Pearson, D. C. Hines Jr., S Golosman, C. D. Kuglin

Proceedings Volume 0119, Applications of Digital Image Processing; (1977) https://doi.org/10.1117/12.955714
Event: 21st Annual Technical Symposium, 1977, San Diego, United States

Abstract

A digital processor has been designed and built to implement Lockheed's Phase Correlation technique at a rate of 30 correlations per second on 128 x 128 element images digitized to eight bits. Phase Correlation involves taking the inverse Fourier transform of the appropriately filtered phase of the Fourier cross-power spectrum of a pair of images to extract their relative displacement vector. It achieves sub-pixel accuracy with relative insensitivity to scene content, illumination differences and narrow-band noise. The processor, which is designed to accept inputs from a variety of sensors, is built with conventional TTL and MOS components and employs only a moderate amount of parallelism. It uses floating point arithmetic with equal exponents for real and imaginary parts. Multiplications are performed by table lookup. Application areas for the correlator include image velocity sensing, correlation guidance and scene tracking.

Citation Download Citation

J. J. Pearson, D. C. Hines Jr., S Golosman, and C. D. Kuglin "Video-Rate Image Correlation Processor", Proc. SPIE 0119, Applications of Digital Image Processing, (8 December 1977); https://doi.org/10.1117/12.955714

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