A Hardware Implementation Of A Parallel 2-D Photoarray For Array-Processors

Nikolaos G. Bourbakis; Gholam Behpour; Dimokritos Panagiotopoulos

doi:10.1117/12.943017

19 October 1987 A Hardware Implementation Of A Parallel 2-D Photoarray For Array-Processors

Nikolaos G. Bourbakis, Gholam Behpour, Dimokritos Panagiotopoulos

Proceedings Volume 0856, IECON '87: Industrial Applications of Robotics & Machine Vision; (1987) https://doi.org/10.1117/12.943017
Event: IECON, Cambridge, 1987, Cambridge, MA, United States

Abstract

This paper presents in detail the design and the performance of a photo-sensor array of 4x4 cells, for parallel input of optical data. This 2-D photoarray of 4x4 cells is the kernel for the construction of a larger one of NxN cells in order to service as a parallel input device for array-processors. In particular, the 2-D photosensive array will be used on the HERMES systolic array vision machine. We investigated phototransistors and photoresistors devices, through both theoretical and experimental work.

Citation Download Citation

Nikolaos G. Bourbakis, Gholam Behpour, and Dimokritos Panagiotopoulos "A Hardware Implementation Of A Parallel 2-D Photoarray For Array-Processors", Proc. SPIE 0856, IECON '87: Industrial Applications of Robotics & Machine Vision, (19 October 1987); https://doi.org/10.1117/12.943017

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