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1.INTRODUCTIONThe Frequency Reference Unit (FRU) is part of the light detection and ranging (LIDAR) instrument placed on the satellite of the French-German Methane Remote Sensing LIDAR Mission1 (MERLIN). For the MERLIN mission absolute frequency accuracy levels in the low MHz range are required in order to be able to detect the atmospheric methane concentration with sufficient resolution.1 The FRU serves as both, a seeding source with high precision for the optical parametric oscillator (OPO) of the main laser and a high-resolution spectrometer for detection of the generated high power pulses that are sent to earth at the spectroscopic wavelengths around 1645 nm. Additionally, the FRU controls the OPO cavity of the main laser in order to adjust and maintain the cavity length to be resonant to the desired frequency. Moreover, the FRU provides a stable seed source to the master oscillator at the 1064 nm operational wavelength. In this paper, we present the final design of the FRU.2 In addition to describing the design, we discuss the critical aspects of the FRU w.r.t. performance, space environment and qualification of the components. The engineering model has been built and is in the final software implementation stage. First performance measurements have been conducted. The most important performance data are summarized at the end of this paper. 2.THE DESIGN OF THE FRUThe FRU consists of free-space optics for the spectroscopic parts, electro-optical components to generate and detect light and a fiber-integrated harness for routing, switching and distributing the light. Analogue and digital electronics including a Field-Programmable Gate Array (FPGA) are used for control and communication purposes and (opto-) mechanical parts for structural and thermal interfacing. The design is described in detail in the next paragraphs. 2.1The functional design of the FRUThe functional and performance requirements of the FRU are:
In the next paragraphs, we will explain the different functional blocks of the FRU. An overview over the functional blocks is shown in Figure 1. Apart from the electronics, four main functional blocks are presented: The Maser Oscillator seeder (OSC-seed), the optical parametric oscillator seeder (OPO-seed), the wavemeter (FRUF) and the absolute frequency reference (FRUA). 2.2Master Oscillator seedThe master oscillator seed (OSC-seed) provides a 10 mW laser light at 1064 nm from a temperature- and current-stabilized laser diode. By temperature tuning, the wavelength can be selected to match the gain maximum of the master oscillator laser. For reliability reasons, two laser diodes are routed to the output port through a combining tap coupler and provide a cold redundancy. The laser diodes are available from Eagleyard in a space-qualified design flown on GAIA. Due to the larger temperature range on MERLIN, a redesign has been made which increases the stiffness of the modules against thermo-mechanical stress. In addition, optical isolators have been integrated in order to avoid mode-hopping of the lasers upon external back-reflections. To verify these changes and also the different type of chip material that is used for the required wavelength, a screening and a lot acceptance test campaign of the actual FM laser diodes will be performed along the guidelines of ESCC 23201. Environmental testing to MERLIN specifications will be performed. The component will be delivered fully qualified by eagleyard Photonics. 2.3Optical Parametric Oscillator seedThe optical parametric oscillator seed (OPO-seed) provides 5 mW laser light at different wavelengths around 1645.55 nm from temperature- and current-stabilized laser diodes. One out of four laser diodes can be selected and routed to the output through three optical switches. In normal operation, three out of the four laser diodes are active and provide the following functions:
All laser diodes can provide any of these three functionalities. The fourth laser diode is not active and serves as a cold redundant reserve in case one of the other laser diodes fails to operate properly. The qualification approach of the laser diodes is the same as for the OSC-seed laser diodes. 2.4The absolute frequency reference (FRUA)The FRUA provides the absolute frequency calibration of the FRU with respect to the methane gas absorption feature. It ensures that the λon wavelength maintains its defined value within 10 MHz accuracy and provides the absolute reference to the measured values of λon and λoff. It consists of a beam collimator, a methane gas cell, three beam splitters and four photodiodes with associated electronics. The assembly is shown in Figure 2. A set of six nearby lines in the methane spectrum invokes a maximum in transmission in their centre, as shown in, and stems from the same absorption feature that is used by the main laser and instrument to detect the methane concentration in the atmosphere of the Earth. This feature is scanned with the reference laser diode and used to stabilize the frequency of the reference laser diode by comparing the transmission through the cell on the lower side edge with the upper side edge (red dots in the figure) and levelling them by adjustment of the reference value λref, which is indicated by the dashed red line. The λref is measured on the wavemeter where the frequency measurements of all other seeders and the transmit pulses are done and can be evaluated relative to it. For the FRUA assembly, a set of InGaAs photo detectors has been procured, which were subjected to a full space qualification. The optical elements will be qualified to the vibrational and shock loads on component or unit level. The coatings are radiation hard by using the SiO2/Ta2O5 material combination. A coating process that ensures dense coatings avoids problems with adsorbed water, which could release under vacuum conditions. 2.5The wavemeterFor frequency measurements of the online and offline seeders, as well as the corresponding OPO transmit pulses, a wavemeter is used. It consists of a monolithic beam collimator, a Fizeau wedge and an InGaAs line detector, as shown in Figure 4. To generate a well-collimated input beam with a diameter of 12.5 mm, an ultra-high numerical aperture single mode fiber is directly spliced to a single surface aspheric lens. This allows for a very robust collimator design and a short assembly length in order to meet the demanding envelope requirements of the FRU. The Fizeau wedge has a length of 35 mm resulting in free-spectral range of 4.28 GHz. The finesse is about 24. The design does not include a cylindrical lens to focus the fringe pattern on the detector array in order to keep the design simple and to save space. Instead, a slit aperture is used to reduce stray light on the detector. The InGaAs line has 640 pixels with a width of 20 microns. Figure 5 (bottom) shows an example of the fringe pattern generated by the Fizeau wedge and recorded with the InGaAs line detector. For frequency determination, the position of the centroid of the fringe on the line detector shall be identified. A FPGA-compatible algorithm filters the recorded pattern with a step like filter function as shown in Figure 5. The result represents the low-pass filtered derivative of the fringe. Using a linear regression on this result provides the zero-crossing point with a resolution of 1/16 of a pixel and therefore a measure for the fringe position. The filter function selects only the steep flanks of the upper 75 % of the fringe signal. The algorithm is very robust against amplitude fluctuations as well as pixel-to-pixel non-uniformities and takes about 142 μs to provide the result. Both, the continuous-wave light from the seeders as well as the OPO pulses with a duration of about 20 ns can be measured with the wavemeter. For rather symmetric input spectra, the algorithm coincides with the centroid. In case the OPO spectrum is too asymmetric, offset compensation parameters can be set. The algorithm itself as well as the InGaAs line detector design provide a certain robustness against pixel failures. Two read-out ICs in an odd-even configuration are used for data acquisition and are followed by dedicated 14-bit analogue-digital-converters. The performance of the wavemeter is sufficient with data only from odd or even pixels available; see Figure 6 a). In addition, a bad pixel map is implemented which can be filled by ground-loop actions to mask dark, bright or blinking pixels. Due to the filtering effect of the algorithm, a failure of up to 12 pixels in a row can be tolerated before the performance of the wavemeter drops below the required resolution, compare Figure 6 b). For the FRUF assembly a commercial InGaAs line has been procured which is undergoing the qualification process at SpaceTech. For what concerns the optical elements, the qualification approach and effort is the same as it has been described in paragraph 2.4 for the FRUA assembly. The Fizeau’s optical length and therefore the fringe position is quite sensitive to pressure and temperature changes, which needs to be accounted for in the ground testing campaign and the operational concept in space. 2.6The FRU harness and opto-electronicsThe optical harness includes tap couplers and optical switches. The tap couplers are all fiber devices, manufactured with a fused biconical taper process. They are bidirectional devices that maintain the polarization of the input. Within the FRU two types of couplers are used: couplers in 2x1 configuration and 2x2 configuration for combination of signals within the FRU and from the ICC. Please refer to Figure 1. High reliable switches are used for routing the signals of the different laser diodes to the submodules. The switching process relies on change of polarization of an electro-optic material by a short pulse of roughly 0.3 ms. Switching is achieved within the first ten microseconds. After switching, no electric power is necessary to maintain the current status. The device is fiber coupled and polarization maintaining. Electro-optic components within the FRU are connected by optical fiber. Therefore, tens of meters of optical fiber are integrated and contribute to the optical harness. All fibers are coated with UV acrylate and, for some components, an additional buffer of thermoplastic elastomer is needed for manufacturing. Except for a short piece of single mode (SM) fiber in front of the FIA, solely polarization maintaining fibers are used. Thus, the alignment and polarization of the optical path in the FRU is almost unaffected by temperature changes and offers great flexibility in fiber routing. Different components are connected by fiber optic splicing, external by Mini-AVIM fiber connectors. A splice qualification process ensures that the optical connections meet the requirements imposed by the space environment. This includes test of depressurization, temperature, optical performance, routing and fixation of the fibers. Long term reliability of the splices are verified by the process sustaining tensions in the 20 N regime and a rigorous screening of the systems splices including a 10 N proof-test. The optical switches haven been procured as commercial high reliability parts and undergo a screening and qualification programme at SpaceTech. 2.7The FRU electronicsThe FRU provides all typical electrical functions and interfaces required for an optical instrument as MERLIN. The electronic design is accommodated on four modules: the power-, OSC-Seed-, OPO-Seed- and calibration module. A flex-rigid backplane connects all modules together. The power module generates the required supply voltages within the FRU from the primary power bus. The OPO-Seed module electronics can be considered as the master board of the FRU comprising the FPGA as the central element. On this module are also the 1645nm laser diodes and their control and drive electronics. The OSC-Seed module electronics include the 1064 nm laser diodes with their control and drive electronics. The calibration module provides the electrical design and interfaces to control the wavemeter and the measurement of the CH4 absorption curve by the photo diodes. Power electronicsThe main primary power bus of the MERLIN satellite is an unregulated direct current (DC) voltage bus with battery connected directly to the bus. The primary voltage range is between 27V and 37V. Two hybrid DC/DC converters and a Point of Load (POL) converter transform the primary power and provide into all required FRU internal supply voltages (+/-9 V, 5.8 V, 3.3 V and -2.6 V). The converter provides a galvanic isolation to be compliant to the EMC requirements (e.g. distributed single point grounding philosophy). An opto-coupler provides an ON/OFF interface for a low power command signal of 5V to enable the DC/DC converter. In the FRU box, a star point grounding concept is realised. The common or central star ground point is chosen within the power module and individual ground lines are distributed to the modules to avoid ground loops. Because the laser diodes are temperature controlled, the power consumption of the FRU depends on the actual ambient temperature. The maximum power consumption at full performance is approximately 23 W. The fundamental conversion frequency of the DC/DC converter is around 300 kHz, generating integral multiple frequencies on the secondary supply voltages. To reduce the converter noise, low pass PI-filters with a cut off frequency of around 5 kHz are implemented on all secondary supply voltages. OPO-Seed module electronicsThe OPO-seed module electronics comprise two printed circuit boards (PCB) as a piggyback solution. The main board establishes the control circuits and electrical devices, whereas the second board mounted on the main board only includes the 1645 nm laser diodes. The central device on the main board is the FPGA (RT3PE3000 from Microsemi). Two linear voltage regulators generate the 1.5 V core and 2.5 V interface voltage of the FPGA, whereas the power board provides the 3.3 V interface voltage directly via the backplane. Due to the robust single event upset (SEU) behaviour of the FPGA, no latch up protection circuitry is required. The FPGA is running with 40 MHz clock driven by an oscillator. In total, four individually-controlled laser diode drivers are realised on the board. The laser diode drivers consist of a very high precision DC constant current sink and a very high precision linear driven thermo-electric cooler (TEC) controller. The FPGA provides the actual current and temperature set point levels to the digital to analogue converter (DAC) with a Serial Peripheral Interface (SPI) bus. Each DAC has a resolution of 12 Bits. To achieve the required current resolution for the OPO-Seed laser diodes, the current sink is divided into two current portions. An offset current is always present if the corresponding laser diode is enabled and, additionally, a variable current with a narrower dynamic range is put on top of the offset current. A current limiter in series to the laser diode protects the laser diode against occurred transients of the current sink operational amplifier and protects the supply voltage against potential short circuits within the laser diode module in the failure case. The current limiter also includes a transistor switch to enable or disable the current sink. The TEC controller is a discrete-implemented PI regulator. The actual laser diode temperature is measured by a NTC-thermistor equipped to each laser diode module. An analogue-digital-converter (ADC) combined with multiplexer devices acquire the actual laser diode current and the TEC temperature as housekeeping (HK) data. Three optical switch drivers are on the board. The driver electronics comprises four bipolar transistors arranged as H-bridge. A pulse shape signal toggles the optical position of the switch and keeps the state like a latch relay. To re-toggle the optical position, a further pulse with reversed polarity is required. The switches’ timing and triggering are controlled by the FPGA. The communication (TM/TC) interface to the instrument control unit (ICU) is a SpaceWire (SpW) interface. The connector of the SpW interface is on the OPO-Seed module. Standard LVDS transmitter and receiver devices realise the electrical interface. OSC-Seed module electronicsThe OSC-Seed module electronics are realised in the same way as for the OPO-Seed module with a piggyback solution comprising the main board establishing the control electronics and a mounted board including the laser diode modules. Two laser diode drivers in a redundant configuration are implemented. The FPGA selects the active laser diode driver and provides the set values via a SPI bus. The electrical circuitry of the laser diode drivers comply with the circuitry of the OPO-Seed module with one exception that no offset current is present. This means that the adjustable laser diode current extends over the full-scale resolution of the DAC. An ADC converts the current of the laser diode and TEC temperature to the FPGA, which provides the monitored values in the TM data as HK values. Calibration module electronicsThe calibration module comprises the wavemeter control electronics and the photodiode amplifiers, measuring the pre- and post-laser signals of the CH4 cell assembly (FRUA). Each photodiode amplifier is realised as a transimpedance amplifier (TIA) to convert the photodiode current into a corresponding voltage. For redundancy reasons, the photodiodes and its amplifier chains are duplicated. The InGaAs line detector is part of the wavemeter. The control electronics of the line detector is on the calibration board and consists mainly of the Analogue-Front-End device LM98640 from TexasInstruments and digital control signals provided by the FPGA. The Analogue-Front-End device is a fully integrated high performance 14-Bit signal processing solution for image processing applications. It integrates two ADC channels operating in parallel with an integrated programmable gain amplifier (PGA) for each channel, converting the analogue output signals from the line detector. The device receives a 5 MHz clock signal from the FPGA and speeds up the clock frequency to a 40 MHz data clock by an internal phase locked loop logic. The converted values are serialised and provided to the FPGA via a dedicated serial interface of LVDS type. A 5 V voltage regulator supplies the line detector. A latch-up protection circuitry protects the line detector against potential single event latch-ups (SEL). In case of a SEU, the FPGA performs a power cycle of the line detector by disabling and enabling the latch-up protection circuitry. Laser Diode DriverWith regard to the optical performance, the development of the laser diode driver has to be emphasized. The frequency stability and noise requirements are challenging. The laser diode driver comprises the following features:
The maximum TEC current of 650 mA allows a linear power output stage which was preferred to a PWM-controlled power amplifier to avoid signal interference. A temperature conditioning circuitry measures the laser diode temperature in a range from -30°C to +80°C with a NTC thermistor installed in the laser diode module. The FPGA delivers the set value of the laser diode temperature. A PI-regulator followed by bipolar-supplied power stage represents the temperature control loop. The integrational portion of the regulator ensures that there is no remaining control deviation. The set value is limited to the optimum operating point of 30°C +/- 10 K. This offers the advantages against the full measurement range that the resolution is improved and it avoids that a failure in commanding the temperatures damages the laser diode. Table 1.Performance Summary of Laser Diode Driver
The laser diode operates with a current from a constant current sink. At the beginning of the project, space qualified high resolution digital-to-analogue converters (DAC) were not available. The choice fell to a 12Bit DAC from Texas Instruments. A further advantage of this device is the SPI interface. Two in parallel operating current sinks apply the constant current to the laser diode: a fixed-offset current of 130 mA and a variable current in the range of +/-3 mA commanded by the FPGA with a resolution of 1.5 μA per step of the DAC. Commercial laser diode driver designs can use a variety of highly sophisticated devices which have been developed for best performance such as offset, stability and noise properties. For space application such as MERLIN, initially only a small number of available components could be selected which meet the space-specific environmental requirements. Therefore, it is remarkable that the developed laser diode driver shows a very good noise characteristic comparable with off the shelf designs and as a reference from literature3 what is needed to have sufficient performance, see Figure 7. 2.8The FPGA designA re-programmable FPGA (RT3PE3000L) is used as the central control element of the FRU. It is connected to 10 DACs (12-bit), 4 ADCs (12-bit), 2 MUXes (8-bit), a SpaceWire RMAP port, 18 digital output and 3 input lines and implements four control loops for λref, λon, λoff, and the OPO cavity. The functionality of the FPGA has been broken down into the following main modules (refer to Table 2.): Table 2.Functional modules of the FPGA
ICU InterfaceThree memory-mapped TM/TC registers and four dedicated memory areas are set aside for communication with the ICU via SpaceWire RMAP:
The FRU Operating ModesIn CONFIG mode, a set of 190 operational parameters (16-bit) must be transferred via SpaceWire into the EDAC and CRC safeguarded memory inside the FPGA, because the FRU itself does not have any non-volatile storage. In STANDBY mode, the thermo-electric-coolers of four laser diodes (λref, λon, λoff, and OSC) are switched on, regulated by an analogue control loop. In DIAGNOSTIC mode, each of the four seeder diodes separately and the optical switches are stimulated in such a way that the analysis of the HK data will allow to pinpoint hardware faults. In OPERATIONAL mode, the currents for the laser diodes are switched on and the control loops start to operate. When the control loops have synchronized, OPO cavity control data will be transmitted to the OPO via SpaceWire. OSC CALIBRATION mode is a sub-mode of OPERATIONAL. While the control loops continue to operate generating HK data, the 1064 nm OSC laser diode will run through a configurable sequence of TEC temperatures and laser diode currents. Later analysis of the HK data allows to select the optimal operating point for the OSC laser diode. ATMOSPHERIC CALIBRATION mode is a sub-mode of OPERATIONAL. λon will be swept across the six methane absorption lines, which are used as absolute frequency reference. As a consequence, OPOon will be swept accordingly, such that the absorption lines in the backscatter signal can be recorded. Rapid PrototypingTo speed up FPGA development, a two-phase approach has been used, exploiting the re-programmability of the FPGA: In the first phase, the sequencer and the control loops have been realized as Forth software running on a so-called micro core (μCore) processor, which is a soft core inside the FPGA.4 The software could be interactively debugged using a UART Rx/Tx interface on the Test port. The FRU’s functional validation suite has been developed on the basis of this processor-assisted design. In the second phase, the software-based implementation will be trans-coded into VHDL and validated using the previously developed validation suite. The development speedup was significant: It only takes about 15 seconds to cross-compile, load the object code and start the debugger. Whereas VHDL synthesis, place&route, bit-stream generation and FPGA configuration takes about 30 minutes. Therefore, the FRU’s functionality could be developed using a rapid prototyping approach. The μCore processor is a VHDL hardware embodiment of the virtual machine underlying the Forth programming language, and μCore’s “assembler” is the core word set of Forth. It is a Harvard architecture, dual stack, deterministic real-time processor with 300 nsec maximum interrupt latency. Therefore, even in the μCore implementation, the jitter of the most time critical operations (OPO-on and OPO-off frequency measurement) is below 2 μs. Radiation mitigationThe external Reset and the PRI pulse is fed into the FPGA three times on three different I/O-banks with internal voting, because each I/O-bank is activated/deactivated by a latch, which is potentially susceptible to SEUs. The FPGA’s output pins are tri-stated by the asynchronous Reset signal and safe states are established externally using pull-up/pull-down resistors. The logic inside the FPGA solely uses a synchronized reset in order to reduce the probability for single event transient-induced resets. All Flip-Flops inside the design, which hold state information, will use triple modular redundancy. The parameter memory will use EDAC for single error correction with scrubbing and a CRC, which is continually checked. When the CRC is not valid, the crc_err-bit will be set in the status register. The internal state variables, which need to be valid for more than one PRI cycle, will be stored in EDAC-safeguarded memory with scrubbing. 2.9The mechanical housing and structural designThe mechanical housing consists of the underlying baseplate and four modules perpendicularly oriented to the baseplate. The mechanical design is driven by the functional requirements of the FRU. There are four basic modules: the Calibration module, the OPO-seed module, the OSC-seed module and the Power module. The modules are interconnected to each other by six M5 bolts. This pre-assembly is then mounted onto the baseplate. Due to the dynamic behaviour of the FRU, the components close to the baseplate are the least-stressed components. The modules are thin-walled aluminium housings with stiffening features. This ensures local stiffness. The PCB boards are bolted to the modules, the bolts are placed in a regular pattern on the stiffening ribs. The mechanical environment during launch is very demanding. The sine test loads are specified up to 150 Hz with up to 27 g. The random and shock loads are also very high for a large component (mass > 5 kg) like the FRU. The random loads are specified with 16.9 grms and 12 grms for out-of plane and in-plane respectively. The shock loads are specified with up to 1000 g at 1000 Hz. The structural design aims for minimizing the vibration loads for the optical components. The metallic structures are sufficiently strong; the design is driven by stiffness and minimum milling thicknesses. Still, the final stiffness has to be traded off against the high shock loads. A more rigid structure leads to lower shock dephasing and routes more shock to the critical large optical components. The analysis of the structure is conducted with Nastran and all environmental tests are supported by these analyses and conducted in-house. 2.10The thermal designThe thermal design of the FRU is a classical passive system. The FRU dissipates approximately 23 W in nominal science operation mode. It utilizes the main thermal contact to the baseplate. The box housing parts are black anodized for increased heat distribution inside the box. The black surfaces outside radiate directly to the spacecraft radiators adjacent to the FRU –Z direction. The thermal design is driven by the laser diodes. The laser diode temperatures are kept constant at temperatures between 27°C and 33°C (depending on the type and function of the diode) with thermo-electric coolers (TEC). These TEC units dissipate waste heat depending on the temperature difference between interface and diode they have to bridge. In order to avoid a thermal runaway, the box temperature upper limit is the critical driver for the thermal design. The design of the box is therefore equipped with high cross-section aluminium bars between the diode interfaces and the bottom plate. The bottom plate is connected with a spacecraft-supplied heat pipe to the spacecraft-supplied radiator. The radiator-facing side of the FRU is the Power module. Most of the dissipated waste heat is at this power module side of the box. The additional heat path via radiation to the radiator is used. The analysis is conducted with ESATAN TMS, the test predictions of the analysis will be verified by TV testing in-house. The predicted temperatures of the CDR analysis loop confirms that all component temperature limits are respected. 2.11Main performance dataWith the engineering model (EM) that is shown in Figure 11, the following main performance numbers could be achieved:
The EM wavemeter incorporates the monolithic fibre collimator design that will be used in the flight model in contrast to the commercial triplet collimator that was used for the bread board model. During the tests of the EM wavemeter it turned out that the used aspheric lens introduces a non-linearity that is three times larger than what had been found for the bread board wavemeter. Further analysis revealed that the manufacturing process of the aspheric lens leads to periodic distortions in the radial direction, which act like a phase grating and modulates the intensity profile of the collimated beam in the far field. To reduce this major source of non-linearity to an uncritical level, a different production process will be used for the next models. 3.CONCLUSION AND FUTURE PROSPECTSIn this paper, we presented the design of the absolute frequency reference unit for the remote sensing LIDAR Mission MERLIN. The absolute frequency is determined by a laser diode that is frequency-locked to the on-board methane gas cell. With a wavemeter, this reference frequency is transferred with an adjustable frequency offset to two other frequency-locked diode lasers with linewidth, stability and setting accuracies in the low MHz range. They are used to seed the online and offline laser pulses generated in the OPO, which are transmitted to the earth. Every single pulse pair is again measured on the wavemeter for spectroscopic reasons. Therefore, every single pulse of the nominally 40 per second generated pulses is known with 10 MHz accuracy and provided in the HK data. These can be used for data analysis on ground to improve the overall sensitivity of the methane detection. Most effort was needed to prove the electro-optic components being qualified for the demanding space and launch environment. In addition, the thermal engineering was crucial in order to have sufficiently stable conditions at the laser diode chips despite the required temperature range from 0°C to 40°C. Vibrational and shock loads are at a critically high level for the free-space optical elements and a trade-off between stiffness and shock dephasing had to be done. The engineering model validated the required performance except for the non-linearity of the wavemeter where further engineering has been conducted to restore the performance that could already be achieved with the bread board FRU. During phase C/D of the FRU development, it has been determined that the wavemeter is the performance-limiting, critical element and additional efforts were required to recover the required performance. Regarding future missions that need higher frequency accuracies (e.g. detection of CO2), an alternative to the wavemeter will be needed. SpaceTech is going to develop such alternative methods in other projects. REFERENCESEhret, G., Bousquet, P., Pierangelo, C., Alpers, M., et al.,
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