Systematic DTCO flow for yield improvement at 14/12nm technology node

Xiaojing Su; Yayi Wei; Rui Chen; Yajuan Su; Lisong Dong; Joe Kwan; Recoo Zhang; Chunshan Du; Qijian Wan; Xinyi Hu

doi:10.1117/12.2551861

23 March 2020 Systematic DTCO flow for yield improvement at 14/12nm technology node

Xiaojing Su, Yayi Wei, Rui Chen, Yajuan Su, Lisong Dong, Joe Kwan, Recoo Zhang, Chunshan Du, Qijian Wan, Xinyi Hu

Proceedings Volume 11328, Design-Process-Technology Co-optimization for Manufacturability XIV; 113280L (2020) https://doi.org/10.1117/12.2551861
Event: SPIE Advanced Lithography, 2020, San Jose, California, United States

Abstract

Design technology co-optimization (DTCO) is one of the most critical considerations for yield breakthrough and product ramp-up during the life cycle of a new technology node. Traditional sign-off flow of physical verification cannot guarantee manufacturability totally. Comprehensive design for manufacturing (DFM) check should be involved in flow of product tape-out in order to recognize the patterning and other process challenges which would limit the wafer yield. The process related hotspots were pre-defined with the aid of process related simulation kits on cell, block as well as full chip levels. A systematic DTCO methodology including fabless process friendly flow with lithography friendly design (LFD), pattern match and chemical mechanical planarization (CMP) check, resolution enhancement technology (RET) synthesis, process window check for sensitive patterns as well as weak pattern library assisted circuit diagnosis was as an example of DTCO application at 14/12nm in this paper.

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Citation Download Citation

Xiaojing Su, Yayi Wei, Rui Chen, Yajuan Su, Lisong Dong, Joe Kwan, Recoo Zhang, Chunshan Du, Qijian Wan, and Xinyi Hu "Systematic DTCO flow for yield improvement at 14/12nm technology node", Proc. SPIE 11328, Design-Process-Technology Co-optimization for Manufacturability XIV, 113280L (23 March 2020); https://doi.org/10.1117/12.2551861

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