An implementation method of ethernet MAC controller IP core

Kui Xiong; Zhimei Zhou; Xiaoyong Wang; Jie Zhou

doi:10.1117/12.2588975

20 January 2021 An implementation method of ethernet MAC controller IP core

Kui Xiong, Zhimei Zhou, Xiaoyong Wang, Jie Zhou

Proceedings Volume 11719, Twelfth International Conference on Signal Processing Systems; 1171910 (2021) https://doi.org/10.1117/12.2588975
Event: Twelfth International Conference on Signal Processing Systems, 2020, Shanghai, China

Abstract

Ethernet Media Access Control (MAC) controller is an indispensable IP core in Field-Programmable Gate Array (FPGA), in order to realize the independent intellectual property rights of MAC controller IP core. This paper designs a MAC controller which supports Media Independent interface (MII) / Gigabit Media Independent Interface (GMII) and supports full duplex / half duplex. According to the definition of Ethernet frame format, MAC control frame structure and Station (STA) management frame format in IEEE 802.3 protocol, the overall structure of MAC controller and the function of each module are designed. Advanced High-performance Bus (AHB) and Advanced Peripheral Bus (APB) are used to realize separate access of data cache and configuration register to improve the transmission efficiency of MAC controller bus. The results of Electronic Design Automation (EDA) and FPGA board level verification show that the MAC controller meets the design requirements of data transmission.

Citation Download Citation

Kui Xiong, Zhimei Zhou, Xiaoyong Wang, and Jie Zhou "An implementation method of ethernet MAC controller IP core", Proc. SPIE 11719, Twelfth International Conference on Signal Processing Systems, 1171910 (20 January 2021); https://doi.org/10.1117/12.2588975

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