Paper
1 May 2022 FPGA realization of signal processing for two-dimensional phased array digital multi-beam radar
Author Affiliations +
Proceedings Volume 12171, Thirteenth International Conference on Signal Processing Systems (ICSPS 2021); 121710C (2022) https://doi.org/10.1117/12.2631442
Event: Thirteenth International Conference on Signal Processing Systems (ICSPS 2021), 2021, Shanghai, China
Abstract
With the increasing use of digital array radars, radar signal processing systems are faced with the challenge of real time processing for a mass of data. A kind of field programmable gate array (FPGA) realization of signal processing is proposed for two-dimensional phased array digital multi-beam radar in this paper. This scheme can realize the real-time signal processing of 6 beams at the same time. Each beam processes data from 8400 range gates. The details of implementation including digital multi-beamforming (DBF), pulse compression and moving target detection (MTD) are described. The results show that the design is correct and feasible.
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Jingwei Hu, Peng Li, Dengbo Sun, Jiangong Shao, Renhong Xie, and Yibin Rui "FPGA realization of signal processing for two-dimensional phased array digital multi-beam radar", Proc. SPIE 12171, Thirteenth International Conference on Signal Processing Systems (ICSPS 2021), 121710C (1 May 2022); https://doi.org/10.1117/12.2631442
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KEYWORDS
Field programmable gate arrays

Signal processing

Digital signal processing

Radar

Phased arrays

Target detection

Analog electronics

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