Optimized modular inversion algorithm over prime fields and hardware implementation

Hao Yu; Zhe Yu; Lin Han

doi:10.1117/12.2680271

31 May 2023 Optimized modular inversion algorithm over prime fields and hardware implementation

Hao Yu, Zhe Yu, Lin Han

Proceedings Volume 12704, Eighth International Symposium on Advances in Electrical, Electronics, and Computer Engineering (ISAEECE 2023); 127043D (2023) https://doi.org/10.1117/12.2680271
Event: 8th International Symposium on Advances in Electrical, Electronics and Computer Engineering (ISAEECE 2023), 2023, Hangzhou, China

Abstract

The modular inversion operations in the prime fields play an important role in the whole elliptic curve cryptosystem, and its operation speed directly determines the execution efficiency of the whole cryptosystem. The binary extended Euclidean algorithm in the existing general modular inversion algorithm is improved to obtain an optimized new algorithm. The new algorithm improves the shift efficiency of the original algorithm and reduces the cost of hardware resources. The 256-bit adder used in the new algorithm is split and reassembled, and the carry lookahead logic is used between groups. The addition and subtraction components are pipelined to improve data throughput. The algorithm is implemented using Verilog hardware description language and verified successfully on Virtex - 7 FPGA development board. The verification results show that the design can correctly handle 256-bit modular inversion operations, and the single calculation only consumes 1.12 μs.

Citation Download Citation

Hao Yu, Zhe Yu, and Lin Han "Optimized modular inversion algorithm over prime fields and hardware implementation", Proc. SPIE 12704, Eighth International Symposium on Advances in Electrical, Electronics, and Computer Engineering (ISAEECE 2023), 127043D (31 May 2023); https://doi.org/10.1117/12.2680271

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