Paper
1 September 1999 Gate-length- and threshold-voltage-dependent nonlinearity in the hot carrier DC lifetime extrapolation for sub-100-nm NMOS devices
Sejal N. Chheda, Navakanta Bhat, Paul Tsui, Suzanne Gonzales, Nigel Cave, Chong-Cheng Fu, Fred Huang, Amit Nangia, Philip Sung-Joon Choi, Sean Collins
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Abstract
In this paper, we discuss the issues involved in the DC hot carrier lifetime extrapolation of sub 100nm NMOS transistors. We look at device degradation due to hot- carrier injection in NMOS transistors with 20 angstrom and 25 angstrom thermal and nitrided oxide gate dielectrics. Stress conditions such as Vg < Vt, Vg > Vt, Vd equals Vd, and Vg at Isubmax are evaluated. Previously, devices greater than 100nm gate length had highest hot carrier degradation at Vg at Isubmax and 1/Vdd linear extrapolation from accelerated stressing condition to operation condition was able to estate the DC lifetime. However, we show that the conventional extrapolation results in a nonlinear fit for devices with gate length
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Sejal N. Chheda, Navakanta Bhat, Paul Tsui, Suzanne Gonzales, Nigel Cave, Chong-Cheng Fu, Fred Huang, Amit Nangia, Philip Sung-Joon Choi, and Sean Collins "Gate-length- and threshold-voltage-dependent nonlinearity in the hot carrier DC lifetime extrapolation for sub-100-nm NMOS devices", Proc. SPIE 3881, Microelectronic Device Technology III, (1 September 1999); https://doi.org/10.1117/12.360551
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KEYWORDS
Oxides

Transistors

Human-computer interaction

Reliability

Transmission electron microscopy

Boron

Capacitors

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