Paper
19 November 2001 Novel testing scheme for selection of capacitive fingerprint sensor LSIs
Toshishige Shimamura, Hiroki Morimura, Hideyuki Unno, Koji Fujii, Satoshi Shigematsu, Katsuyuki Machida, Hakaru Kyuragi
Author Affiliations +
Proceedings Volume 4593, Design, Characterization, and Packaging for MEMS and Microelectronics II; (2001) https://doi.org/10.1117/12.448833
Event: International Symposium on Microelectronics and MEMS, 2001, Adelaide, Australia
Abstract
We propose a novel testing scheme to select good chip of capacitive fingerprint sensor LSIs. Conventional testing uses actual finger touching. For mass production, accuracy, high speed, and low cost are needed in testing. To check the sensor LSI at the wafer level using an LSI tester, we add a self-testing function to each pixel in the sensor LSI. The pixel-self-check extracts error pixels whose output is abnormally fixed. These pixels degrade the fingerprint image. A fingerprint sensor LSI with the self-testing function was fabricated using the 0.5-micrometers CMOS process/sensor process. It demonstrates that the pixel-self-check extracts error pixels accurately. The proposed testing scheme enables the selection of good chips at the wafer level without finger touching.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Toshishige Shimamura, Hiroki Morimura, Hideyuki Unno, Koji Fujii, Satoshi Shigematsu, Katsuyuki Machida, and Hakaru Kyuragi "Novel testing scheme for selection of capacitive fingerprint sensor LSIs", Proc. SPIE 4593, Design, Characterization, and Packaging for MEMS and Microelectronics II, (19 November 2001); https://doi.org/10.1117/12.448833
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KEYWORDS
Sensors

Capacitance

Wafer testing

Calibration

Semiconducting wafers

Image sensors

Inspection

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