High speed clock recovery with phase locked loop based on LiNbO3 modulators

Guanghao Zhu; Hongmin Chen; Qiang Wang; Niloy K. Dutta

doi:10.1117/12.510182

19 August 2003 High-speed clock recovery with phase-locked-loop-based on LiNbO₃ modulators

Guanghao Zhu, Hongmin Chen, Qiang Wang, Niloy K. Dutta

Proceedings Volume 5247, Optical Transmission Systems and Equipment for WDM Networking II; (2003) https://doi.org/10.1117/12.510182
Event: ITCom 2003, 2003, Orlando, Florida, United States

Abstract

In this paper, we present a scheme for recovering 10 GHz clock from 40 Gb/s and 80 Gb/s time division multiplexed (TDM) return to zero (RZ) data stream. The proposed clock recovery is successfully demonstrated using an electrical phase locked loop (PLL). The jitter of the recovered clock is estimated to be around 50 fs. The key part in the proposed clock recovery circuit is a LiNbO₃ Mach-Zehnder modulator which is shown to be highly effective in optical to electrical down conversion.

Citation Download Citation

Guanghao Zhu, Hongmin Chen, Qiang Wang, and Niloy K. Dutta "High-speed clock recovery with phase-locked-loop-based on LiNbO₃ modulators", Proc. SPIE 5247, Optical Transmission Systems and Equipment for WDM Networking II, (19 August 2003); https://doi.org/10.1117/12.510182

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