Paper
5 December 2011 A novel algorithm and its VLSI architecture for connected component labeling
Author Affiliations +
Proceedings Volume 8005, MIPPR 2011: Parallel Processing of Images and Optimization and Medical Imaging Processing; 80050C (2011) https://doi.org/10.1117/12.902126
Event: Seventh International Symposium on Multispectral Image Processing and Pattern Recognition (MIPPR2011), 2011, Guilin, China
Abstract
A novel line-based streaming labeling algorithm with its VLSI architecture is proposed in this paper. Line-based neighborhood examination scheme is used for efficient local connected components extraction. A novel reversed rooted tree hook-up strategy, which is very suitable for hardware implementation, is applied on the mergence stage of equivalent connected components. The reversed rooted tree hook-up strategy significant reduces the requirement of on-chip memory, which makes the chip area smaller. Clock domains crossing FIFOs are also applied for connecting the label core and external memory interface, which makes the label engine working in a higher frequency and raises the throughput of the label engine. Several performance tests have been performed for our proposed hardware implementation. The processing bandwidth of our hardware architecture can reach the I/O transfer boundary according to the external interface clock in all the real image tests. Beside the advantage of reducing the processing time, our hardware implementation can support the image size as large as 4096*4096, which will be very appealing in remote sensing or any other high-resolution image applications. The implementation of proposed architecture is synthesized with SMIC 180nm standard cell library. The work frequency of the label engine reaches 200MHz.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hualong Zhao, Hongshi Sang, and Tianxu Zhang "A novel algorithm and its VLSI architecture for connected component labeling", Proc. SPIE 8005, MIPPR 2011: Parallel Processing of Images and Optimization and Medical Imaging Processing, 80050C (5 December 2011); https://doi.org/10.1117/12.902126
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KEYWORDS
Image processing

Clocks

Very large scale integration

Raster graphics

Binary data

Electroluminescence

Feature extraction

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