High speed and low storage cost name lookup based on field programmable gate array

Jiangtian Lu; Tong Li; Wenlan Diao

doi:10.1117/12.3004182

11 October 2023 High speed and low storage cost name lookup based on field programmable gate array

Jiangtian Lu, Tong Li, Wenlan Diao

Proceedings Volume 12800, Sixth International Conference on Computer Information Science and Application Technology (CISAT 2023); 128004P (2023) https://doi.org/10.1117/12.3004182
Event: 6th International Conference on Computer Information Science and Application Technology (CISAT 2023), 2023, Hangzhou, China

Abstract

As a future network architecture, Named Data Networking (NDN) adopts content name addressing. While decoupling content from location and brings about rapid expansion of routing tables, it makes lookup speed a bottleneck for high-speed data forwarding. Compared to the table lookup method involving CPU, FPGA can significantly improve the table lookup speed through parallel processing. However, there is a huge contradiction between the large scale of NDN routing table and the limited memory space on FPGA chips. Using FPGA external memory can store routing tables, but its reading speed is slow. To address the above issues, a novel cuckoo searcher structure was first designed to reduce FPGA storage space consumption, with a capacity of over 500K in 10Mbit storage space, which is at least 4 times higher than existing BCD algorithms. Then, multiple cuckoo searchers were combined in parallel, called Cuc-FIB, to improve the search speed to 312.5M times per second, which is 64% higher than the existing BST algorithm. Cuc-FIB has been deployed on the Xilinx Zynq 7000 FPGA platform, capable of carrying 500K routing tables and completing 10Gbps, 4-port line speed routing forwarding.

(2023) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Jiangtian Lu, Tong Li, and Wenlan Diao "High speed and low storage cost name lookup based on field programmable gate array", Proc. SPIE 12800, Sixth International Conference on Computer Information Science and Application Technology (CISAT 2023), 128004P (11 October 2023); https://doi.org/10.1117/12.3004182

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KEYWORDS

Field programmable gate arrays

Tunable filters

Data storage

Clocks

Network architectures

Design and modelling

Logic

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