A circuit-topology-driven approach to Optical Proximity Correction (OPC) is presented. By tailoring device
critical dimension (CD) statistical distribution to the device function in the circuit, and ensuring that the CD
distribution stays within the correct (possibly variable) limits during process maturation and other process
changes, it can be an effective tool for optimizing circuit's performance/yield tradeoff in high-volume manufacturing.
Calibre's proprietary Programmable Electrical Rule Checks (PERC) module is used to recognize the
topology. Alternatively, an external static timing tool can be used to identify critical devices.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.