Dr. Jacek K. Flak Profile

Dr. Jacek K. Flak

at Aalto Univ School of Science and Technology

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Proceedings Article | 29 June 2005 Paper

FG-MOS neuron for binary CNN

Jacek Flak, Mika Laiho, Kari Halonen

Proceedings Volume 5839, (2005) https://doi.org/10.1117/12.608059

KEYWORDS: Neurons, Binary data, Logic, Computer programming, Switches, Capacitors, Image processing, Transistors, Field effect transistors, Molybdenum

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This paper presents a neuron implementation based on floating-gate MOSFET (FG-MOS) structure. The computation is performed by charge distribution at the input of FG-MOS inverter determining the cell state. There is no current-flow through the interconnections after processing is completed, thus a significant reduction in DC power consumption can be achieved. Such neuron can be used to build a capacitively coupled cellular neural/nonlinear network (CNN) for processing black and white (B/W) images. Although the coupling coefficients are basically implemented with capacitances, this approach provides them with 1-bit programmability. Also the neuron's threshold level can be digitally programmed to four different values. The templates operating on the B/W images can be modified to have only binary-valued {0,1} terms or can be split into such (sequentially run) simple subtasks. Therefore, the presented neuron structure is able to perform the evaluation of almost all B/W templates proposed so far. Exploration of FG-MOS structures can help to understand the implementation problems of capacitively coupled CNNs. Such a situation appears, e.g., in nanoelectronic CNNs composed of single-electron tunneling (SET) transistors, which also deal with B/W images only. Moreover, the binary programmability approach utilized here should help to develop an effective programming scheme for future SET or CMOS-SET hybrid CNN implementations. Along with the neuron structure, its operation description and simulation results of the 8 x 8 network are presented.

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