KEYWORDS: Computer programming, Binary data, Chemical elements, Video, Logic, Very large scale integration, Field programmable gate arrays, Video coding, Data modeling, Multiplexers
One key technique for improving the coding efficiency of H.264 video standard is the entropy coder, context-adaptive binary arithmetic coder (CABAC). However the complexity of the encoding process of CABAC is significantly higher than the table driven entropy encoding schemes such as the Huffman coding. CABAC is also bit serial and its multi-bit parallelization is extremely difficult. For a high definition video encoder, multi-gigahertz RISC processors will be needed to implement the CABAC encoder. In this paper, we provide an efficient, pipelined VLSI architecture for CABAC encoding along with an analysis of critical issues. The solution encodes
a binary symbol every cycle. An FPGA implementation of the proposed scheme capable of 104 Mbps encoding
rate and test results are presented. An ASIC synthesis and simulation for a 0.18 μm process technology indicates
that the design is capable of encoding 190 million binary symbols per second using an area of 0.35 mm2.
Lossless compression of raw CCD images captured using color filter arrays has several benefits. The benefits include improved storage capacity, reduced memory bandwidth, and lower power consumption for digital still camera processors. The paper discusses the benefits in detail and proposes the use of a computationally efficient block adaptive scheme for lossless compression. Experimental results are provided that indicate that the scheme performs well for CCD raw images attaining compression factors of more than two. The block adaptive method also compares favorably with JPEG-LS. A discussion is provided indicating how the proposed lossless coding scheme can be incorporated into digital still camera processors enabling lower memory bandwidth and storage requirements.
The H.264 video compression standard uses a context-adaptive binary arithmetic coder (CABAC) as an entropy coding mechanism. While the coder provides excellent compression efficiency, it is computationally demanding. On typical general-purpose processors, it can take up to hundreds of cycles to encode a single bit. In this paper, we propose an architecture for a CABAC encoder that can easily be incorporated into system-on-chip designs for H.264 compression. The CABAC is inherently serial and we divide the problem into several stages to derive a design that can provide a throughput of two cycles per encoded bit. The engine proposed is capable of handling binarization of the syntactical elements and provides the coded bit-stream via a first-in first-out buffer. The design is implemented on an Altera FPGA platform that can run at 50 MHz enabling a 25 Mbps encoding rate.
There have been a large number of methods proposed for encrypting images by shared key encryption mechanisms. All the existing techniques are applicable to primarily non-compressed images. However, most imaging applications including digital photography, archiving, and internet communications nowadays use images in the JPEG domain. Application of the existing shared key cryptographic schemes for these images requires conversion back into spatial domain. In this paper we propose a shared key algorithm that works directly in the JPEG domain, thus enabling shared key image encryption for a variety of applications. The scheme directly works on the quantized DCT coefficient domain and the resulting noise-like shares are also stored in the JPEG format. The decryption process is lossless. Our experiments indicate that each share image is approximately the same size as the original JPEG retaining the storage advantage provided by JPEG.
Lossless coding of image data has been a very active area of research in the field of medical imaging, remote sensing and document processing/delivery. While several lossless image coders such as JPEG and JBIG have been in existence for a while, their compression performance for encoding continuous-tone images were rather poor. Recently, several state of the art techniques like CALIC and LOCO were introduced with significant improvement in compression performance over traditional coders. However, these coders are very difficult to implement using dedicated hardware or in software using media processors due to their inherently serial nature of their encoding process. In this work, we propose a lossless image coding technique with a compression performance that is very close to the performance of CALIC and LOCO while being very efficient to implement both in hardware and software. Comparisons for encoding the JPEG- 2000 image set show that the compression performance of the proposed coder is within 2 - 5% of the more complex coders while being computationally very efficient. In addition, the encoder is shown to be parallelizabl at a hierarchy of levels. The execution time of the proposed encoder is smaller than what is required by LOCO while the decoder is 2 - 3 times faster that the execution time required by LOCO decoder.
Block-based motion estimation (ME) has been a very active area of research in the field of video signal processing and coding. Traditional ME techniques consider only the sum of the absolute differences between the current and the reference blocks to find the motion vectors (MV). Recently, several rate-constrained ME techniques have been proposed which considers the effect of encoding the MV by adding an entropy constraint to the distortion measure. Such techniques show an improved performance at low bit-rates. The displaced frame difference blocks are typically transformed using discrete cosine transform and then quantized in the transform domain. In our proposed scheme, an entropy-constrained ME algorithm is proposed which considers the number of bits allotted for coding the DFD's in addition to those used for encoding the MV and the MB mode information. Simulation results show that the proposed technique performs significantly better than the standard technique for a wide range of bit-rates. In addition, a computationally less complex scheme is also proposed, although with reduced performance improvements over the conventional scheme. The implementation aspects of the proposed schemes are also briefly discussed.
KEYWORDS: Multimedia, Video, Standards development, Digital video discs, Computer programming, Computing systems, RGB color model, Video compression, Colorimetry, Speech recognition
With the introduction of faster processors and special instruction sets tailored to multimedia, a number of exciting applications are now feasible on the desktops. Among these is the DVD playback consisting, among other things, of MPEG-2 video and Dolby digital audio or MPEG-2 audio. Other multimedia applications such as video conferencing and speech recognition are also becoming popular on computer systems. In view of this tremendous interest in multimedia, a group of major computer companies have formed, Multimedia Benchmarks Committee as part of Standard Performance Evaluation Corp. to address the performance issues of multimedia applications. The approach is multi-tiered with three tiers of fidelity from minimal to full compliant. In each case the fidelity of the bitstream reconstruction as well as quality of the video or audio output are measured and the system is classified accordingly. At the next step the performance of the system is measured. In many multimedia applications such as the DVD playback the application needs to be run at a specific rate. In this case the measurement of the excess processing power, makes all the difference. All these make a system level, application based, multimedia benchmark very challenging. Several ideas and methodologies for each aspect of the problems will be presented and analyzed.
In this paper we describe a design of a high performance JPEG (Joint Photographic Experts Group) Micro Channel adapter card. The card, tested on a range of PS/2 platforms (models 50 to 95), can complete JPEG operations on a 640 by 240 pixel image within 1/60 of a second, thus enabling real-time capture and display of high quality digital video. The card accepts digital pixels for either a YUV 4:2:2 or an RGB 4:4:4 pixel bus and has been shown to handle up to 2.05 MBytes/second of compressed data. The compressed data is transmitted to a host memory area by Direct Memory Access operations. The card uses a single C-Cube's CL550 JPEG processor that complies with the baseline JPEG. We give broad descriptions of the hardware that controls the video interface, CL550, and the system interface. Some critical design points that enhance the overall performance of the M/JPEG systems are pointed out. The control of the adapter card is achieved by an interrupt driven software that runs under DOS. The software performs a variety of tasks that include change of color space (RGB or YUV), change of quantization and Huffman tables, odd and even field control and some diagnostic operations.
In a companion paper we describe a Micro Channel adapter card that can perform real-time JPEG (Joint Photographic Experts Group) compression of a 640 by 480 24-bit image within 1/30th of a second. Since this corresponds to NTSC video rates at considerably good perceptual quality, this system can be used for real-time capture and manipulation of continuously fed video. To facilitate capturing the compressed video in a storage medium, an IBM Bus master SCSI adapter with cache is utilized. Efficacy of the data transfer mechanism is considerably improved using the System Control Block architecture, an extension to Micro Channel bus masters. We show experimental results that the overall system can perform at compressed data rates of about 1.5 MBytes/second sustained and with sporadic peaks to about 1.8 MBytes/second depending on the image sequence content. We also describe mechanisms to access the compressed data very efficiently through special file formats. This in turn permits creation of simpler sequence editors. Another advantage of the special file format is easy control of forward, backward and slow motion playback. The proposed method can be extended for design of a video compression subsystem for a variety of personal computing systems.
An established way to synthesize associative memory networks is to use dynamical neural networks. For large dimensional problems, the dynamical networks usually are computationally burdensome to design and generally introduce spurious memories. A new architecture that consists of an input linear filter, a hidden layer of dynamical network and an output linear filter is proposed in this paper to alleviate some of the difficulties in designing large dimensional dynamical networks. A learning rule and its simplified version are presented for the design of the network parameters.
Discrete frequency domain design of Minimum Average Correlation Energy filters for optical pattern recognition
introduces an implementational limitation of circular correlation. An alternative methodology which uses space
domain computations to overcome this problem is presented. The technique is generalized to construct an improved
synthetic discriminant function which satisfies the conflicting requirements of reduced noise variance and sharp
correlation peaks to facilitate ease of detection. A quantitative evaluation of the performance characteristics of
the new filter is conducted and is shown to compare favorably with the well known Minimum Variance Synthetic
Discriminant Function and the space domain Minimum Average Correlation Energy filter, which are special cases of the present design.
An inherent implementational limitation of the recently developed minimum average correlation energy (MACE) filters arises from the circular correlation implicit in the discrete frequency domain approach followed. An alternative methodology that uses space domain computations to overcome these limitations is presented. An improved synthetic discriminant function (SDF) that satisfies the conflicting requirements of reduced noise variance and sharp correlation peaks to facilitate ease of detection is developed by employing a unified framework for design. A quantitative evaluation of the performance characteristics of the new filter is conducted and is shown to compare favorably with the well known
minimum variance SDF and the space domain MACE filter, which are special cases of the present design.
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