We have developed a pixel unit for CMOS image sensors (CISs) that has a shared transistor architecture with diagonally
connected pixels. This pixel unit is composed of four photodiodes and seven transistors. It has a pixel size of 2.5-&mgr;m
square. The transistors were designed using 0.18-micron aluminum process technology.
Shared diffusion for reading signal electrons occurs between the corners of two photodiodes. The advantages of this
layout include a long amplifier gate length and a large photodiode area.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.