KEYWORDS: Monte Carlo methods, Phase measurement, Device simulation, Analog electronics, Picosecond phenomena, System on a chip, Telecommunications, Sensors, VHF band, Oscillators
This work deals with the development of test techniques for RF (Radio Frequency) components. The optimization of
production tests for RF PLLs (Phase Locked Loops) is targeted in particular. With devices of ever increasing speed, it is
no longer possible to measure some of the classical circuit performances even with dedicated RF testers. This problem
has been tackled in recent years by using BIST (Built-In Self Test) techniques for PLLs able to perform on-chip high
resolution measurements such as picosecond jitter. However, this risks to become also impossible at very high
frequencies.
This paper will present some preliminary work towards the optimization of production tests for RF PLLs with the aim of
avoiding traditional test measurements such as phase noise. Attention will be focused on single relevant blocks of the
RF PLL that have the greatest impact on phase noise and other critical performances. The VCO (Voltage Controlled
Oscillator) block will be first studied, since it gives the greatest contribution to phase noise. Our work will proceed by
taking into consideration the possibility to detect mismatches and leakages in CP (Charge Pump) currents that cause
spurious in the output spectrum. Simulation results in this paper will consider only catastrophic faults in circuit
components. The fault coverage of performances and simple test measurements that can be implemented on-chip for the
VCO is thus evaluated.
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