Photonic integrated circuits (PICs) have been demonstrated as a promising technology to implement flexible and hitless reconfigurable devices for telecom, datacom and optical interconnect applications. However, the complexity scaling of such devices is raising novel needs related to their control systems, and the automatic calibration, reconfiguration and operation of these complex architectures both during manufacturing and in service is still an open issue.
In this contribution, we report our recent achievements on the automatic hitless tuning of a telecommunication-graded filter operating in the L band, fabricated on a commercial foundry Silicon Photonics (SiP) run. A novel channel labeling strategy is used to automatically identify the desired channel within a Dense Wavelength Division Multiplexing (DWDM) through a FPGA-embedded closed-loop control algorithm.
The photonic architecture consists of a hitless third order Micro Ring Resonator (MRR) filter with 8 nm Free Spectral Range (FSR), integrating transparent detectors (ContactLess Integrated Photonic Probes - CLIPP) as power monitors and thermooptic actuators. Transparent detectors enable to control the input/output port of the filter without introducing any loss to the WDM channel comb. Hitless operation is achieved through a pair of switchable Mach-Zehnder interferometers used as input/output couplers of the MRR filter. The fabricated device has a 3 dB bandwidth of 40.7 GHz and provides a through-port in-band isolation of 23 dB and a drop port isolation of 25 dB at 50 GHz spacing from the dropped channel. Hitless reconfiguration is achieved with more than 30 dB isolation during channel selection.
The automatic tuning and locking technique is based on the use of a pilot tone generated locally at the node site and applied as a low frequency (few kHz), small modulation index (< 8%), amplitude modulation on the channel to be added to the network. The effectiveness and robustness of the automatic controller for tuning and stabilization of the filter is demonstrated by showing that no significant bit-error rate (BER) degradation is observed in an adjacent channel while the filter is being reconfigured. In addition, the convergence of the algorithm is shown to require only few tens of iterations, each one requiring a few milliseconds.
The FPGA-embedded control technique together with the compactness provided by SiP meets the integration requirements for high capacity networks and pluggable modules. In addition, the filter unit can be cascaded with other units to realize a multichannel reconfigurable add-drop architecture operating on several wavelengths at the same time with complete independency.
Advanced technologies to implement on-chip monitoring and feedback control operations are required to make silicon photonics scale to large-scale-of-integration. Transparent detectors and energy saving actuators are key ingredients of this paradigm. On-chip detectors are required to be minimally invasive in order to allow their integration in key spots of the circuit, thus easing control operation through the partitioning of complex architectures in smaller cluster of devices and the realization of local feedback control loops. Non volatile integrated actuators, which are reversible switching devices that can maintain the state without the need of “always on” power dissipation, are also needed to reduce the power consumption required by tuning, reconfiguration and stabilization operations. Addressing these issues, in this contribution we report on the performance of a recently developed transparent detector, named ContacLess Integrated Photonic Probe (CLIPP), that can monitor in line the intensity of the light in silicon waveguides without introducing any photon absorption in excess to the waveguide propagation loss. A systematic characterization of the CLIPP detector is here presented, specifically addressing the dependence of the CLIPP performance on the waveguide geometry and on the polarization and wavelength of the light. Concerning the development of non-volatile integrated actuators, we demonstrate the possibility to manipulate the light transmission in silicon waveguides by electrochemical insertion of mobile ions in a mixed ionic and electronic conductor (MIEC) used as upper cladding of a silicon waveguide. A finely controllable and reversible change of the imaginary part of the refractive index of the MIEC film is exploited to trim the loss of a silicon waveguide and to modify the frequency response of a silicon microring resonator.
The complexity scaling of silicon photonics circuits is raising novel needs related to control. Reconfigurable
architectures need fast, accurate and robust procedures for the tuning and stabilization of their working point,
counteracting temperature drifts originated by environmental fluctuations and mutual thermal crosstalk from surrounding
integrated devices. In this contribution, we report on our recent achievements on the automated tuning, control and
stabilization of silicon photonics architectures. The proposed control strategy exploits transparent integrated detectors to
monitor non-invasively the light propagating in the silicon waveguides in key spots of the circuit. Local monitoring
enables the partitioning of complex architectures in small photonic cells that can be easily tuned and controlled, with
need for neither preliminary circuit calibration nor global optimization algorithms. The ability to monitor the Quality Of
of Transmission (QoT) of the optical paths in Photonic Integrated Circuits (PICs) is also demonstrated with the use of
channel labelling and non-invasive light monitoring. Several examples of applications are presented that include the
automatic reconfiguration and feedback controlled stabilization of an 8×8 switch fabric based on Mach-Zehnder
interferometers (MZIs) and the realization of a wavelength locking platform enabling feedback-control of silicon
microring resonators (MRRs) for the realization of a 4×10 Gbit/s wavelength-division-multiplexing transmitter. The
effectiveness and the robustness of the proposed approach for tuning and stabilization of the presented architectures is
demonstrated by showing that no significant performance degradation is observed under uncooled operation for the
silicon chip.
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