Dr. Thomas Cecil Profile

Dr. Thomas Cecil

Principal Engineer at Synopsys Inc

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Author

Publications (24)

Proceedings Article | 30 April 2023 Presentation

Machine learning based inverse lithography technology for an advanced DRAM contact layer

Moongyu Jeong, Hyunchul Kim, Kyle Braam, Munhoe Do, Kangjin Kim, Jongcheon Park, Chunsoo Kang, Chanha Park, Thomas Cecil

Proceedings Volume 12495, 124951E (2023) https://doi.org/10.1117/12.2657808

KEYWORDS: Machine learning, Lithography, Photomasks, Source mask optimization, Numerical analysis, Convolutional neural networks, Computational lithography

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Proceedings Article | 22 March 2021 Presentation + Paper

Machine learning ILT for memory customers

Thomas Cecil, Kyle Braam, Ahmed Omran, Amyn Poonawala, Jason Shu, Clark Vandam

Proceedings Volume 11613, 116130P (2021) https://doi.org/10.1117/12.2587107

KEYWORDS: Machine learning, Visualization, Optical proximity correction, Neural networks

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Proceedings Article | 23 March 2020 Presentation + Paper

Establishing fast, practical, full-chip ILT flows using machine learning

Thomas Cecil, Kyle Braam, Ahmed Omran, Amyn Poonawala, Jason Shu, Clark Vandam

Proceedings Volume 11327, 1132706 (2020) https://doi.org/10.1117/12.2551425

KEYWORDS: Data modeling, Photomasks, Lithography, Machine learning, Optical proximity correction, Convolution, Network architectures, Inverse problems, Calibration

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Proceedings Article | 24 March 2017 Paper

Addressing optical proximity correction challenges from highly nonlinear models

Stephen Jang, Yunqiang Zhang, Tom Cecil, Howard Cai, Amyn Poonawala, Matt St. John

Proceedings Volume 10147, 101471S (2017) https://doi.org/10.1117/12.2258088

KEYWORDS: Optical proximity correction, Lithography, Photomasks, Computational lithography, Lithium, 193nm lithography, Chemical elements, SRAF

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Proceedings Article | 16 March 2016 Paper

Building block style recipes for productivity improvement in OPC, RET and ILT flows

Linghui Wu, Denny Kwa, Jinyin Wan, Tom Wang, Matt St. John, Steven Deeth, Xiaohui Chen, Tom Cecil, Xiaodong Meng, Kevin Lucas

Proceedings Volume 9781, 978116 (2016) https://doi.org/10.1117/12.2222591

KEYWORDS: Optical proximity correction, Photomasks, Lithography, Computer programming, Resolution enhancement technologies, Model-based design, Optical lithography, 193nm lithography, Atrial fibrillation, Software development

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Traditional model-based Optical Proximity Correction (OPC) and rule-based Resolution Enhancement Technology (RET) methods have been the workhorse mask synthesis methods in volume production for logic and memory devices for more than 15 years. Rule-based OPC methods have been in standard use for over 20 years now. With continuous technical enhancements, these methods have proven themselves robust, flexible and fast enough to meet many of the technical needs of even the most advanced nodes. Inverse Lithography Technology (ILT) methods are well known to have strong benefits in finding flexible mask pattern solutions to improve process window for the most advanced design locations where traditional methods are not sufficient.

However, OPC/RET requirements at each node have changed radically in the last 20 years beyond just technical requirements. The volume of engineering work to be done has also skyrocketed. The number of device layers which need OPC/RET can be 10X higher than in earlier nodes. Additionally, the number of mask layers per device layer is often 2X or more times higher with multiple patterning. Finally, the number of features to correct per mask increases ~2X with each node. These factors led to a large increase in the number of OPC engineers needed to develop the complex new OPC/RET recipes for advanced nodes.

In this paper, we describe new developments which significantly improve the productivity of OPC engineers to deploy Rule Based OPC (RBOPC), Model Based OPC (MBOPC), AF, and ILT recipes in modern manufacturing flows. In addition to technical improvements such as novel multiple segment hotspot fixing solvers and ILT hot-spot fixing necessary to support correction needs, we have re-architected the entire flow based on how OPC engineers now develop and maintain OPC/RET recipes. The re-architecture of the flow takes advantages of more recent developments in modular and structured programming methods which are known to benefit ease engineering software development applications. Therefore, this improved OPC/RET development methodology includes specifically targeted advanced new technical functions; new types of modular structures for much faster reuse of customizations; and new interfaces to flexible programming capabilities to enable easier development and integration of deep customizations for the most challenging technical needs.

Proceedings Article | 31 March 2014 Paper

Hybrid inverse lithography techniques for advanced hierarchical memories

Guangming Xiao, Kevin Hooker, Dave Irby, Yunqiang Zhang, Brian Ward, Tom Cecil, Brett Hall, Mindy Lee, Dave Kim, Kevin Lucas

Proceedings Volume 9052, 90522D (2014) https://doi.org/10.1117/12.2048022

KEYWORDS: Photomasks, Lithography, Optical lithography, Optical proximity correction, Chromium, Model-based design, Logic, Optimization (mathematics), Semiconducting wafers, Critical dimension metrology

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Traditional segment-based model-based OPC methods have been the mainstream mask layout optimization techniques in volume production for memory and embedded memory devices for many device generations. These techniques have been continually optimized over time to meet the ever increasing difficulties of memory and memory periphery patterning. There are a range of difficult issues for patterning embedded memories successfully. These difficulties include the need for a very high level of symmetry and consistency (both within memory cells themselves and between cells) due to circuit effects such as noise margin requirements in SRAMs. Memory cells and access structures consume a large percentage of area in embedded devices so there is a very high return from shrinking the cell area as much as possible. This aggressive scaling leads to very difficult resolution, 2D CD control and process window requirements. Additionally, the range of interactions between mask synthesis corrections of neighboring areas can extend well beyond the size of the memory cell, making it difficult to fully take advantage of the inherent designed cell hierarchy in mask pattern optimization. This is especially true for non-traditional (i.e., less dependent on geometric rule) OPC/RET methods such as inverse lithography techniques (ILT) which inherently have more model-based decisions in their optimizations. New inverse methods such as model-based SRAF placement and ILT are, however, well known to have considerable benefits in finding flexible mask pattern solutions to improve process window, improve 2D CD control, and improve resolution in ultra-dense memory patterns. They also are known to reduce recipe complexity and provide native MRC compliant mask pattern solutions. Unfortunately, ILT is also known to be several times slower than traditional OPC methods due to the increased computational lithographic optimizations it performs. In this paper, we describe and present results for a methodology to greatly improve the ability of ILT to optimize advanced embedded memory designs while retaining significant hierarchy and cell design symmetry, therefore, have good turnaround time and CD uniformity. This paper will explain the enhancements which have been developed in order to overcome the traditional difficulties listed above. These enhancements are in the categories of local CD control, global chip processing options, process window benefit, turn-around time and hierarchy retention.

Proceedings Article | 1 October 2013 Paper

Model-driven target optimization to resolve design hotspots through image quality enhancement

Sung-Woo Lee, Tom Cecil, Guangming Xiao, Mindy Lee, Jung-Hoe Choi, Seung-Hee Baek, Jin-Hyuck Jeon, Chan Ha Park, Dave Kim, Kevin Lucas

Proceedings Volume 8880, 88801U (2013) https://doi.org/10.1117/12.2026140

KEYWORDS: Optical proximity correction, Image quality, Optimization (mathematics), Nanoimprint lithography, Image enhancement, Image processing, Design for manufacturing, Resolution enhancement technologies, Neodymium, Nano opto mechanical systems

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Proceedings Article | 4 April 2011 Paper

Lithography aware design optimization using ILT

Jaeyoon Jeong, Seokyun Jeong, Changhoon Ahn, Yongsun Jang, Sukjoo Lee, Thomas Cecil, Donghwan Son, Tatung Chow, David Kim

Proceedings Volume 7974, 797409 (2011) https://doi.org/10.1117/12.879393

KEYWORDS: Photomasks, Lithography, Optical proximity correction, Source mask optimization, Photovoltaics, Optical lithography, Optimization (mathematics), Detection and tracking algorithms, Electroluminescence, Semiconducting wafers

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Proceedings Article | 23 March 2011 Paper

Overcome the process limitation by using inverse lithography technology with assist feature

Yeon-Ah Shim, Sungho Jun, Jaeyoung Choi, Kwangseon Choi, Jae-won Han, Kechang Wang, John McCarthy, Guangming Xiao, Grace Dai, DongHwan Son, Xin Zhou, Tom Cecil, David Kim, Ki-Ho Baik

Proceedings Volume 7973, 79732S (2011) https://doi.org/10.1117/12.870704

KEYWORDS: Lithography, SRAF, Photomasks, Image processing, Optical lithography, Optical proximity correction, Semiconducting wafers, Resolution enhancement technologies, Overlay metrology, Logic

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Proceedings Article | 23 March 2011 Paper

Hotspot fixing using ILT

Woojoo Sim, Sunggon Jung, Hyun-Jong Lee, Sungsoo Suh, Jung-Hoon Ser, Seong-Woon Choi, Chang-Jin Kang, Thomas Cecil, Christopher Ashton, David Irby, Xin Zhou, D.H. Son, Guangming Xiao, David Kim

Proceedings Volume 7973, 79731L (2011) https://doi.org/10.1117/12.879781

KEYWORDS: Photomasks, Optical proximity correction, Semiconducting wafers, Photovoltaics, Data modeling, Lithography, SRAF, Calibration, Nanoimprint lithography, Resolution enhancement technologies

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Proceedings Article | 23 March 2011 Paper

Enhancing fullchip ILT mask synthesis capability for IC manufacturability

Thomas Cecil, Chris Ashton, David Irby, Lan Luan, D. H. Son, Guangming Xiao, Xin Zhou, David Kim, Bob Gleason, H. J. Lee, W. J. Sim, M. J. Hong, S. G. Jung, S. S. Suh, S. W. Lee

Proceedings Volume 7973, 79731C (2011) https://doi.org/10.1117/12.882814

KEYWORDS: Photomasks, Lithography, Optical proximity correction, Manufacturing, SRAF, Image segmentation, Inverse problems, Optimization (mathematics), Electronics, Electroluminescence

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Proceedings Article | 29 September 2010 Paper

Affordable and process window increasing full chip ILT masks

Guangming Xiao, Dave Irby, Tom Cecil, David Kim, Shuichiro Ohara, Isao Aburatani

Proceedings Volume 7823, 78233T (2010) https://doi.org/10.1117/12.866131

KEYWORDS: Photomasks, SRAF, Vestigial sideband modulation, Optical alignment, Critical dimension metrology, Lithography, Optical proximity correction, Photovoltaics, Resolution enhancement technologies, Image segmentation

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Proceedings Article | 29 September 2010 Paper

Improving model prediction accuracy for ILT with aggressive SRAFs

Sunggon Jung, Woojoo Sim, Moongyu Jeong, Junghoon Ser, Sungwoo Lee, Seoung-woon Choi, Xin Zhou, Lan Luan, Thomas Cecil, Donghwan Son, Robert Gleason, David Kim

Proceedings Volume 7823, 782311 (2010) https://doi.org/10.1117/12.864528

KEYWORDS: SRAF, Optical proximity correction, Scanning electron microscopy, Calibration, Diffusion, Photomasks, Lithography, Performance modeling, Cadmium sulfide, Critical dimension metrology

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Proceedings Article | 27 May 2010 Paper

Best depth of focus on 22-nm logic wafers with less shot count

Aki Fujimura, David Kim, Tadashi Komagata, Yasutoshi Nakagawa, Vikram Tolani, Tom Cecil

Proceedings Volume 7748, 77480V (2010) https://doi.org/10.1117/12.866413

KEYWORDS: Photomasks, Semiconducting wafers, SRAF, Vestigial sideband modulation, Scanning electron microscopy, Logic, Lithography, Manufacturing, Error analysis, Light sources

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Proceedings Article | 27 May 2010 Paper

Improvement of KrF contact layer by inverse lithography technology with assist feature

Sungho Jun, Yeon-Ah Shim, Jaeyoung Choi, Kwangsun Choi, Jae-won Han, Kechang Wang, John McCarthy, Guangming Xiao, Grace Dai, DongHwan Son, Xin Zhou, Tom Cecil, David Kim, KiHo Baik

Proceedings Volume 7748, 77481V (2010) https://doi.org/10.1117/12.868563

KEYWORDS: Lithography, SRAF, Photomasks, Image processing, Optical lithography, Optical proximity correction, Resolution enhancement technologies, Lithographic illumination, Scanners, Computer simulations

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Proceedings Article | 26 May 2010 Paper

E-beam writing time improvement for inverse lithography technology mask for full-chip

Guangming Xiao, Dong Hwan Son, Tom Cecil, Dave Irby, David Kim, Ki-Ho Baik, Byung-Gook Kim, SungGon Jung, Sung Soo Suh, HanKu Cho

Proceedings Volume 7748, 77481T (2010) https://doi.org/10.1117/12.867995

KEYWORDS: SRAF, Photomasks, Image segmentation, Lithography, Control systems, Stereolithography, Critical dimension metrology, Electron beam lithography, Manufacturing, Resolution enhancement technologies

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Proceedings Article | 10 March 2010 Paper

Optimization from design rules, source and mask, to full chip with a single computational lithography framework: level-set-methods-based inverse lithography technology (ILT)

Linyong Pang, Danping Peng, Peter Hu, Dongxue Chen, Tom Cecil, Lin He, Guangming Xiao, Vikram Tolani, Thuc Dam, Ki-Ho Baik, Bob Gleason

Proceedings Volume 7640, 76400O (2010) https://doi.org/10.1117/12.848145

KEYWORDS: Source mask optimization, Photomasks, Lithography, SRAF, Optical proximity correction, Photovoltaics, Optimization (mathematics), Logic, Semiconducting wafers, Computational lithography

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Proceedings Article | 12 December 2009 Paper

Source mask optimization (SMO) at full chip scale using inverse lithography technology (ILT) based on level set methods

Linyong Pang, Peter Hu, Danping Peng, Dongxue Chen, Tom Cecil, Lin He, Guangming Xiao, Vikram Tolani, Thuc Dam, Ki-Ho Baik, Bob Gleason

Proceedings Volume 7520, 75200X (2009) https://doi.org/10.1117/12.843578

KEYWORDS: Source mask optimization, Photomasks, SRAF, Lithography, Optical proximity correction, Photovoltaics, Optimization (mathematics), Logic, Semiconducting wafers, Manufacturing

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Proceedings Article | 30 September 2009 Paper

Source-mask co-optimization (SMO) using level set methods

Vikram Tolani, Peter Hu, Danping Peng, Tom Cecil, Robert Sinn, Linyong Pang, Bob Gleason

Proceedings Volume 7488, 74880Y (2009) https://doi.org/10.1117/12.833430

KEYWORDS: Photomasks, Photovoltaics, Source mask optimization, Logic, Lithography, SRAF, Mathematical modeling, Model-based design, Performance modeling, Optical proximity correction

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Proceedings Article | 23 September 2009 Paper

Mask pattern recovery by level set method based inverse inspection technology (IIT) and its application on defect auto disposition

Jin-Hyung Park, Paul D. H. Chung, Chan-Uk Jeon, Han Ku Cho, Linyong Pang, Danping Peng, Vikram Tolani, Tom Cecil, David Kim, KiHo Baik

Proceedings Volume 7488, 748809 (2009) https://doi.org/10.1117/12.830034

KEYWORDS: Photomasks, Inspection, Defect inspection, Lithography, SRAF, Image classification, Wafer-level optics, Semiconducting wafers, Defect detection, Scanning electron microscopy

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Proceedings Article | 23 September 2009 Paper

Patterning of 90nm node flash contact hole with assist feature using KrF

Yeonah Shim, Sungho Jun, Jaeyoung Choi, Kwangseon Choi, Jae-won Han, Kechang Wang, John McCarthy, Guangming Xiao, Grace Dai, DongHwan Son, Xin Zhou, Thomas Cecil, David Kim, KiHo Baik

Proceedings Volume 7488, 748837 (2009) https://doi.org/10.1117/12.833499

KEYWORDS: Lithography, SRAF, Photomasks, Optical lithography, Image processing, Lithographic illumination, Optical proximity correction, Resolution enhancement technologies, Scanners, Computer simulations

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Proceedings Article | 17 October 2008 Paper

Considering MEEF in inverse lithography technology (ILT) and source mask optimization (SMO)

Linyong Pang, Guangming Xiao, Vikram Tolani, Peter Hu, Thomas Cecil, Thuc Dam, Ki-Ho Baik, Bob Gleason

Proceedings Volume 7122, 71221W (2008) https://doi.org/10.1117/12.803801

KEYWORDS: Photomasks, Source mask optimization, Lithography, SRAF, Logic, Semiconducting wafers, Resolution enhancement technologies, Photovoltaics, Image processing, Optical proximity correction

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Proceedings Article | 19 May 2008 Paper

Source optimization and mask design to minimize MEEF in low k1 lithography

Guangming Xiao, Tom Cecil, Lingyong Pang, Bob Gleason, John McCarty

Proceedings Volume 7028, 70280T (2008) https://doi.org/10.1117/12.793036

KEYWORDS: Photomasks, Lithography, Image processing, SRAF, Resolution enhancement technologies, Photovoltaics, Semiconducting wafers, Source mask optimization, Design for manufacturing, Manufacturing

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Proceedings Article | 12 March 2008 Paper

Validation of inverse lithography technology (ILT) and its adaptive SRAF at advanced technology nodes

Linyong Pang, Grace Dai, Tom Cecil, Thuc Dam, Ying Cui, Peter Hu, Dongxue Chen, Ki-Ho Baik, Danping Peng

Proceedings Volume 6924, 69240T (2008) https://doi.org/10.1117/12.775084

KEYWORDS: SRAF, Photomasks, Optical proximity correction, Semiconducting wafers, Lithography, Lithographic illumination, Imaging devices, Inverse problems, Scanners, Fiber optic illuminators

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Showing 5 of 24 publications

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