With the continuous development of advanced semiconductor technology, the critical pattern shrinkage stably in integrated circuits has become a crucial step for product performance improvement and power consumption reduction. Compared with EUV technology, ArF immersion lithography of DUV is still the most popular research for advanced wafer fabrication, which makes the local critical dimension uniformity (LCDU) improvement become challenging for continuous pattern shrinkag. In the known research, LCDU for small hole pattern is affected by various factors, such as MEEF/OPC model/pattern density on mask and litho/Etch/Metrology process and so on. In the previous study, the improvement of wafer LCDU could be achieved by reducing MEEF of using HT PSM mask. On this basis, we also studied a new type of low sensitivity photoresist for HT PSM mask, which has better performance in controlling LER and LWR. In the meantime, compared with the actual performance of mask LCDU, it is verified that this new photoresist has obvious improvement. This paper mainly studies and compares the differences between the new low sensitivity photoresist and traditional photoresist, and conducts experiments to verify its performance on mask LCDU with extreme small hole patterns. It was found that the LCDU of the mask using new photoresist is improved by ~12%. Furthermore, in the actual application of fab production, the wafer LCDU is improved about 6~10%, and the pattern resolution and profile have also been improved to some extent, this research has played an important role in the development of advanced semiconductor processes.
Reticle defect problem caused by different reasons is an unavoidable issue for mask application in fab, which has great influence on the quality and yield of chip product. With the development of chip pitch size, defect management became increasingly important for the higher demand of defect printability. For different patterns of reticle, the impact is quite different owing to the defect location relative to patterns is different which may impact critical dimension (CD) and actual pattern distort on wafer and result in product yield loss. In this study, we used a special algorithm to combine die to die detection results with MEBES data, and defined the defects risk with the energy attenuation (energy loss) of the whole pattern region which different from traditional point-to-point comparison in KLA inspection equipment. Besides, we introduced sensitivity factor(S) for better evaluate the defect risk. The mathematical relationship between the size of the mask defect and the wafer CD are verified by experiments and based on the experimental results, we established the energy loss auto measurement system for monitoring and analysis system of the defect of the hole pattern mask by correlate the size of the defects to the light energy loss rate, which effectively reduces the process risk caused by the mask defect.
As chip feature sizes have continued to shrink, resolution enhancement techniques such as Optical Proximity Correction (OPC) have been utilized in advanced technology nodes. In recent years, Inverse Lithography Technology (ILT), a new OPC technique, has been widely applied in advanced Logic and Memory applications to improve imaging performance. Compared to the conventional OPC, ILT enables better process windows (PW) with low edge placement error (EPE) and high wafer critical dimension uniformity (CDU), etc. However, the nonrectilinear mask shapes in ILT make mask writing extremely complex and slow, which can potentially cause more mask manufacturing errors. Therefore, it’s important to quantitatively study the MEEF in ILT masks. In this work, we studied the MEEFs of 2D patterns corrected by ILT and conventional OPC and the differences between these two techniques. The results show that the MEEF at different positions (local MEEF) on an ILT mask has a bigger mean of ~3.14 and a smaller σ of ~0.09 relative to the mean of ~2.14 and σ of ~0.67 from a conventional OPC mask. The MEEF budget is analyzed based on the separated main features (MF) and subresolution assist features (SRAF). With SRAFs being inserted into the entire layout of the ILT mask, it contributes to all individual patterns with ~ 45% (1.49) of the total MEEF. Meanwhile, a conventional OPC mask only has SRAFs on the edges. Thus, SRAFs only contribute MEEF to the patterns located in the edge region (within the proximity effect range). Thus, the main center region of the OPC Mask has a lower MEEF contribution (~1.7). These results suggest that in the ILT recipe tuning process, MEEF should also be included in the cost function as a nonlinear factor so that the inversion can minimize MEEF while optimizing PW and EPE. Furthermore, the manhattanization of the ILT Mask can effectively reduce MEEF.
In Dynamic Random Access Memory (DRAM) manufacturing process, contact hole (CH) patterns are critical and challenging array layers. Compared to line/space patterns, CH patterns generally tend to have a higher Mask Error Enhancement Factor (MEEF), therefore it will bring big challenges to wafer Global Critical Dimension Uniformity (GCDU) control, and it is also obvious to observe that the intra-field CDU error contributes mainly to the wafer GCDU variations compared with inter-field error. To improve CH patterns’ intra-field CDU, lithography process generally uses ASML scanner dose mapper (DOMA) solution. Here we introduce a new intra-field CDU improvement technology called CD Correction (CDC) by mask tuning, which is developed by Carl Zeiss and can obtain local illumination transmittance control with higher space resolution than DOMA. In our CDC application cases of contact hole (aka 2D pattern) layers, CDU in both X-Y directions is crucial for process, but different improvement results are found. When CDU in one direction is fully improved by CDC, improvement in the other direction is often insufficient or excessive and hard to achieve a win-win effect. By further experiments and analysis, the key factor we figure out is CDCR (CDC ratio), which is different in X-Y directions. In our work, first, we present a CDC implementation approach that trades off both X-Y directions of improvement. Second, the principle of different CDCR in X-Y directions is explored, it provides a theoretical interpretation for different CDCR and can predict CDCR in future applications.
As the medium that transfers integrate circus design graphics to wafer, reticle has irreplaceable importance. DRAM lithography process below 20nm needs multi-patterning technology without EUV adoption, which means more masks need to be used to reach a certain process target. At present, the conventional masks in the industry are divided into phase shift mask(PSM) and chrome on glass (COG) mask. This paper focuses on haze research for COG mask. Haze has always been an unavoidable topic for mask management. In CXMT some traditional haze like ammonium sulfate has almost disappeared. However, several COG masks in a set of products still suffered haze issues which caused very short lifetime. This haze has very typical characteristics, which is different from ammonium sulfate haze or molybdenum oxide haze widely recognized in worldwide. Based on the mask layout, the correlation between haze and mask pattern was explored, as well as the specific location relationship between haze and line in the pattern. Two different haze types named type L and type C were identified based on their aggregation map, of which the growth rate and frequency were tracked, and the chemical sources were identified based on the microscopic results. Based on what we found, the mask manufacture process in mask house and mask management process in fab were optimized to maximum mask lifetime.
EUV is considered to be the promising lithography technology for the continuous evolution of semiconductor nodes. However, the mainstream ArF/Immersion lithography are still used in current industry and keep continual develop process node ahead. The performance of the mask determines the quality of lithography process directly. Litho-images on wafer come from mask pattern. The quality control of exposure image like local CD uniformity(LCDU) become the most critical factor except the optical proximity correction (OPC) effect. In view of the great challenge of LCDU improvement of small hole pattern on the of 1xnm process research and development. How to use ArF/Immersion lithography technology to improve the performance of hole pattern is this research topic. A new high transmission phase shift mask(HT-PSM) developed on the common ArF/Immersion platform and compared with the performance of normalized image log slope(NILS), mask error enhancement factor(MEEF) and depth of focus (DOF), found that 30%HT-PSM has advantage over the hole pattern. In this paper, research for positive tone development(PTD) and negative tone development(NTD) on high transmission phase shift rate. Different transmission manufacturing processes and application of 30%PSM are compared with conventional 6%PSM. At the same time, litho-image exposure on wafer can be measured and compared in actual research and development. Combine the results of resolution and physical failure analysis(PFA) results, it has higher resolution and good section-cross profile. Meanwhile, the LCDU is improved about 10% batter than conventional PSM mask, which makes an effective contribution to the research and development of advanced process.
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