Some over-etch (OE) related defects in semiconductor device processing are only obvious after vias or trenches are already filled. Such defects are usually buried and often discovered after failure analysis from failed devices. Inline detection by physical means using optical inspection tools is not possible. e-Beam inspection has the ability to detect this type of defect electrically. OE related defects create shorts or leakage paths and their ability to cause device failure depends on the level or extent of this leakage. Hard OE fail impacts yield while marginal OE is relatively harmless. e-Beam inspection detects both hard OE fail and marginal OE as bright voltage contrast (BVC) and it has always been a challenge to discern yield impacting hard OE fail from the relatively harmless OE based only on the defect images. TEM analysis is often necessary to distinguish between the two. In this paper attempt is made to relate the extent of OE to e-Beam defect detection parameters, Threshold (TH) and Grey Level (GLV). Correlation between the amount of OE and each of the two parameters is established. Also a correlation is found among the two parameters themselves. With these relationships established, the e-Beam defect detection parameters alone can be used to predict OE’s potential impact on yield without TEM analysis.
Shrinking design rule coupled with complex device geometries and introduction of new materials in the manufacturing of today’s semiconductor devices generate inherent device weak points which in turn give rise to mechanisms that result in yield impacting defects. The development and introduction of finFET has helped considerably in the quest to further shrink design rule. However, the design and complex manufacturing process involved in producing these high performance finFET devices bring with it a whole new class of defects that have considerable impact on device performance and yield. Some of these defects are buried beneath the wafer surface and are very difficult to detect. They are often missed by optical inspection, only to cause fails at final testing. Failure analysis (FA) then becomes the only means by which they are uncovered. FA is a destructive methodology and its benefits are realized only after the fact. Unlike FA, e-Beam inspection is non-destructive. e-Beam uses electron optics and has a unique ability to detect buried defects electrically by voltage contrast (VC) between a defective structure and its reference. As process window gets tighter and tighter process margin becomes difficult to predict. In this work, e-Beam inspection and overlay data is used to identify process weakness regions on wafer to predict fails and help optimize process and improve yield.
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