KEYWORDS: Semiconducting wafers, Critical dimension metrology, Scanning electron microscopy, Overlay metrology, Sensors, Signal detection, 3D metrology, Etching, Electron beams, Electron microscopes
An auto e-beam tilt technology was used to measure bottom critical dimensions (CD) of High-Aspect Ratio (HAR) contact holes. Results show that traditional Scanning Electron Microscope (SEM) is not capable of catching bottom information, such as bending structures. A new method with hardware and software has been developed to first find the best angle to detect bottom electron signals with high acceleration voltage and then synthesize with multi-angle electron signals. By using this method, accurate bottom CD as well as the angle and direction of bended hole can be measured automatically. It is very effective for inline metrology of HAR 3D structure in semiconductor wafer processing.
Tilted channel holes affect final yield significantly in High Aspect Ratio (HAR) 3D NAND memory wafer processing. An in-line measurement method is developed to use machine learning that utilizes the spectra from optical metrology to map Tilt-X and Tilt-Y. Reliable reference is provided by high voltage SEM. Results show that the correlation of optical and HV e-Beam measurements has R2 more than 0.92. In addition, measurement throughput is improved tremendously by 40% from e-Beam to optical metrology. Combined with other optical metrology on the same platform (thickness, and Optical CD), this method is much efficient for in-line tilt measurement after channel hole etch process.
KEYWORDS: Metrology, Semiconducting wafers, Image processing, Metals, 3D metrology, Atomic force microscopy, Chemical mechanical planarization, 3D image processing, Wafer bonding, Data processing
The 3D NAND (three-dimensional NAND type) has rapidly become the standard technology for enterprise flash memories, and is also gaining widespread use in other applications. Continued manufacturing process improvements are essential in delivering memory devices with higher I/O performance, higher bit density, and lower cost. Current 3D NAND technology involves process steps that form array and peripheral CMOS (Complementary Metal-Oxide-Semiconductor) regions side-by-side, resulting in waste of silicon real estate and film stress compromises, and limits the paths of making advanced 3D NAND devices. An innovative architecture was invented to overcome these challenges by connecting two wafers electrically through millions of metal VIAs (Vertical Interconnect Access) simultaneously across the whole wafer in one process step [1]. A highly accurate and efficient metrology is required to monitor the VIA interface due to the increased process complexity and precision requirements. With the advanced processing of AFM (Atomic Force Microscopy) images, highly accurate and precise measurements have been achieved. An inline pattern-centric metrology solution that is designed for high volume mass production of high-performance 3D NAND is presented in this paper.
A new metrology method of quantitatively measuring wiggling patterns in a Self-Aligned Double Patterning (SADP) process for 2D NAND technology has been developed with a CD-SEM metrology program on images from a Review-SEM system. The metrology program provided accurate modeling of various wiggling patterns. The Review-SEM system provided a-few-micrometer-wide Field of View (FOV), which exceeds precision-guaranteed FOV of a conventional CD-SEM. The result has been effectively verified by visual inspection on vertically compressed images compared with Wiggling Index from this new method. A best-known method (BKM) system has been developed with connected HW and SW to automatically measure wiggling patterns.
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